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Espressif Systems /ESP32-P4 /UART0 /RS485_CONF_SYNC

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Interpret as RS485_CONF_SYNC

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (RS485_EN)RS485_EN 0 (DL0_EN)DL0_EN 0 (DL1_EN)DL1_EN 0 (RS485TX_RX_EN)RS485TX_RX_EN 0 (RS485RXBY_TX_EN)RS485RXBY_TX_EN 0 (RS485_RX_DLY_NUM)RS485_RX_DLY_NUM 0RS485_TX_DLY_NUM

Description

RS485 mode configuration

Fields

RS485_EN

Set this bit to choose the rs485 mode.
DL0_EN

Set this bit to delay the stop bit by 1 bit.
DL1_EN

Set this bit to delay the stop bit by 1 bit.
RS485TX_RX_EN

Set this bit to enable receiver could receive data when the transmitter is transmitting data in rs485 mode.
RS485RXBY_TX_EN

1’h1: enable rs485 transmitter to send data when rs485 receiver line is busy.
RS485_RX_DLY_NUM

This register is used to delay the receiver’s internal data signal.
RS485_TX_DLY_NUM

This register is used to delay the transmitter’s internal data signal.

Links

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data